Integrated circuits, for example those incorporated in “Smart Cards,” may contain sensitive information which needs to be kept secret, and/or circuitry which must be guarded from tampering. By their very nature, however, the integrated circuits, also known as chips, may be relatively easily accessible to tampering by an unauthorized person, and the prevention and/or detection of such tampering is consequently an important consideration in designing the chips. There are a number of forms of tampering which are known, including de-capsulation, reverse engineering, the introduction of glitches into a part of the chip, active optical attacks, etc.
Active optical attacks comprise illuminating an integrated circuit (IC), or a part of the IC, so as to compromise the security of the circuit. The illumination typically prevents a section of the IC working correctly, and/or makes the IC operate differently, and/or changes content of a memory cell, and thus inserts a fault into the IC. Optical Fault Induction Attacks, by Skorobogatov et al., Cryptographic Hardware and Embedded Systems 2002, Springer Lecture, Notes in Computer Science, (May 2002) describes one method of optical attack, and some of the results that may be produced. The attack may be able to decipher data encoded into the IC, set data to a different value, and/or introduce errors into operation of the IC. The article describes a defensive technology using self-time dual-rail logic, where a state of the dual-rail logic that is normally an unwanted state is used as an error signal to lock the device.
International Patent Application WO 01/50530, to Kommerling et al., describes an IC which has an encryption/decryption circuit which protects a memory and/or a central processing unit (CPU) from tampering. The IC includes a protective member, typically the IC encapsulation or packaging, which has a physical parameter that is detected if tampering with the IC is attempted. The physical parameter may be derived from areas of the protective member dispersed across or around the IC. Detecting a change in the parameter causes the encryption/decryption circuit to function differently.
European Patent Application EP1128248, to Dietl, describes a semiconductor chip comprising a monolithically integrated circuit, at least one light-sensitive element, and a switching means which triggers a reset command for the circuit. The reset command is triggered depending on the state of the at least one light-sensitive element. A flip-flop is provided as the switching means.
U.S. Pat. No. 5,998,858 to Little et al., whose disclosure is incorporated herein by reference, describes a combination of hardware and software mechanisms that prevent unauthorized access to the data stored in a memory of an IC with a sealed enclosure. The IC may have various wrongful entry detection circuits that destroy live SRAM data upon tampering with the sealed enclosure. The detection circuits can include light sensing circuitry.
U.S. Pat. No. 5,533,123 to Force et al., whose disclosure is incorporated herein by reference, describes a chip which is secured against intrusion by three interrelated systems: (i) detectors, which alert the chip to the existence of a security attack; (ii) filters, which correlate the data from the various detectors, weighing the severity of the attack against the risk to the chip's integrity; and (iii) responses, which are countermeasures, calculated by the filters to be most appropriate under the circumstances, to deal with the attack or attacks present. The detectors may include light detectors.
U.S. Pat. No. 5,053,992 to Gilberg et al., whose disclosure is incorporated herein by reference, describes a chip having a memory that stores secret data, and an opaque layer of material encapsulating the chip. Removal of the encapsulation is detected by a light sensitive element, and this in turn causes the secret data to be eliminated from the memory element.
While the above systems provide some measure of security for an integrated circuit against optical attack, they may be circumvented by an optical attack that is focused on a relatively small portion of the chip.
The disclosures of all references mentioned above and throughout the present specification are hereby incorporated herein by reference.